Empleos de Pcie

Indra Space is seeking a Senior Digital Hardware Engineer to design and develop complex digital boards for high-performance satellite systems.

Indra Space is seeking a Senior Digital Hardware Engineer to design and develop complex digital boards for high-performance satellite systems, focusing on FPGA/SoC/microcontroller-based hardware…

Safran Electronics & Defense Spain is seeking a Hardware Engineer to join their team in Granada, Spain, designing custom boards with high-end FPGAs, SoCs, and high-speed interfaces for critical…

Indra busca un/a Ingeniero/a Senior de Desarrollo Hardware Digital para diseñar tarjetas electrónicas digitales de altas prestaciones en proyectos de radar y vigilancia electrónica en el sector…

Indra busca un/a Ingeniero/a de Desarrollo FPGA con más de 10 años de experiencia en diseño digital para proyectos de defensa, centrados en radar y vigilancia electrónica.

Indra busca un/a Ingeniero/a de HW Digital para diseñar tarjetas digitales basadas en FPGA, microprocesadores y microcontroladores, integrando memorias DDR, ADCs y comunicaciones de alta velocidad.

Openchip is seeking a RAS Hardware Architect to join their SoC Architecture team in Barcelona.

The Security I/O Hardware Design team at Openchip is responsible for developing and integrating advanced security features and I/O solutions across a diverse product portfolio.

Se busca un Ingeniero/a de Hardware Digital con al menos 5 años de experiencia para un proyecto del sector Defensa, participando en el desarrollo de bancos de prueba para módulos digitales sobre…

Axelera AI is seeking a System Architect for Datacenter Hardware to own the hardware architecture of their AI accelerator systems, from server through rack to datacenter-level deployment.

SiPearl, a European fabless semiconductor company, is hiring a Senior FPGA prototyping engineer to build a full-stack FPGA prototyping platform for their HPC/AI CPUs.

SiPearl, a European fabless semiconductor company, is hiring a Senior IP subsystem SoC architect to define and drive IP, subsystem, and SoC architectures for high-performance CPUs.